IBM PPC440X5 Uživatelský manuál stáhnout pdf (Strana 407)

100

101

srawi

Shift Right Algebraic Word Immediate

Preliminary PPC440x5 CPU Core User’s Manual

instrset.fm.

September 12, 2002 Page 407 of 589

srawi

Shift Right Algebraic Word Immediate

n ← SH

← ROTL((RS), 32 – n)

← MASK(n, 31)

← (RS)

(RA) ← (r ∧ m) ∨ (

s ∧¬m)

XER[CA]

← s ∧ ((r ∧¬m)≠0)

The contents of register RS are shifted right by the number of bits specified in the SH field. Bits shifted out of

the least significant bit are lost. Bit RS

is replicated to fill the vacated positions on the left. The result is

placed into register RA.

If register RS contains a negative number and any 1-bits were shifted out of the least significant bit position,

XER[CA] is set to 1; otherwise, it is set to 0.

Registers Altered

•RA

• XER[CA]

• CR[CR0] if Rc contains 1

srawi RA, RS, SH Rc=0

srawi. RA, RS, SH Rc=1

31 RS RA SH 824 Rc

0 6 11 16 21 31

1 2 ... 402 403 404 405 406 407 408 409 410 411 412 ... 589 590

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